Software and firmware that provide a reliable high-performance control link for particle physics electronics, by implementing a simple A32/D32 control protocol for reading and modifying memory-mapped resources within FPGA-based hardware devices.
Enables the description of custom HDL types in simple YAML structures, bridging the HDL library gap in multi-language projects like VHDL, SystemVerilog, HLS.
Provides implementations for often required hardware functions such as Arithmetic Units, Caches, Clock-Domain-Crossing Circuits, FIFOs, RAM wrappers, and I/O Controllers.